Currently, numerous electronic devices, such as cellular mobile telephones, tablets, decoders, etc., and more generally onboard devices, have power saving modes which allow the power consumption to be reduced and the heat dissipation to be limited.
Conventionally, the power distribution networks (or PDN) for electronic devices comprise a set of switching regulators and/or a power management unit (or PMU). This allows the power supply to the various areas of the system-on-a-chip to be distributed efficiently.
Furthermore, in such a manner as to increase the precision of voltage regulation for sensitive electronic devices such as systems-on-a-chip, the idea is to provide closed-loop control for the voltage regulator with a negative feedback voltage coming from inside the device, for example that taken from the power grid. This allows the voltage losses, due notably to the printed circuit board (or PCB) onto which the system-on-a-chip is mounted and to the packaging, to be compensated.
Generally speaking, a system-on-a-chip, notably when it incorporates a central processing unit (or CPU), is the assembly with the highest power consumption within a product and modes dedicated to power saving are provided.
The methods used most commonly for implementing these power saving modes are adaptive voltage scaling (or AVS) and dynamic voltage and frequency scaling (or DVFS) which are both aimed at adapting the various power supply voltages of the various parts of the system-on-a-chip to their lowest possible values taking into account the state of the system-on-a-chip.
More precisely, a desired value of regulated power supply voltage is determined by the system-on-a-chip as a function of a set of criteria such as the frequency of the clock signal supplying the central processing unit, the temperature, the variations of certain parameters due to the process of fabrication on silicon, etc.
This desired regulated power supply voltage is subsequently used in the feedback control loop.
For this purpose, dedicated circuits for carrying out the voltage adaptation are used.
Amongst these circuits may notably be mentioned those, for example, incorporated into portable devices such as mobile telephones, tablets, whose architecture contains a power management unit (PMU) containing a control interface connected to a homologous control interface of the system-on-a-chip via a specific bus, for example an SPI or I2C bus, together with regulators. Programmable regulators may also be used.
However, such an architecture proves to be costly and it requires a dedicated interface for the control bus which can occupy several input/output terminals of the system-on-a-chip.
A second type of possible architecture includes the use of a module delivering pulses with a modulated width (pulse width modulation: PWM) associated with a low-pass filter in such a manner as to eliminate the AC modulation and to only keep the DC voltage.
However, such an architecture requires a suitable design and the implementation of a low-pass filter external to the system-on-a-chip and introduces a time delay between the moment when the desired regulated power supply voltage is calculated and the moment when the correction is applied in the regulator.
However, such a delay is not acceptable when the voltage must be dynamically adapted (DVFS).